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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32WB35CCU6ATR 데이터시트(PDF) 140 Page - STMicroelectronics |
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STM32WB35CCU6ATR 데이터시트(HTML) 140 Page - STMicroelectronics |
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140 / 193 page  Electrical characteristics STM32WB55xx STM32WB35xx 140/193 DS11929 Rev 10 6.3.20 Analog-to-Digital converter characteristics Unless otherwise specified, the parameters given in Table 77 are preliminary values derived from tests performed under ambient temperature, fPCLK frequency and VDDA supply voltage conditions summarized in Table 24: General operating conditions. Note: It is recommended to perform a calibration after each power-up. Table 77. ADC characteristics(1) (2) (3) Symbol Parameter Conditions Min Typ Max Unit VDDA Analog supply voltage - 1.62 - 3.6 V VREF+ Positive reference voltage VDDA ≥ 2 V 2 - VDDA V VDDA < 2 V VDDA V VREF- Negative reference voltage -VSSA V fADC ADC clock frequency Range 1 0.14 - 64 MHz Range 2 0.14 - 16 fs Sampling rate for FAST channels Resolution = 12 bits - - 4.26 Msps Resolution = 10 bits - - 4.92 Resolution = 8 bits - - 5.81 Resolution = 6 bits - - 7.11 Sampling rate for SLOW channels Resolution = 12 bits - - 3.36 Resolution = 10 bits - - 4.00 Resolution = 8 bits - - 4.57 Resolution = 6 bits - - 7.11 fTRIG External trigger frequency fADC = 64 MHz Resolution = 12 bits -- 4.26 MHz Resolution = 12 bits - - 15 1/fADC VCMIN Input common mode Differential mode (VREF++ VREF-) / 2 - 0.18 (VREF++ VREF-) / 2 (VREF++ VREF-) / 2 + 0.18 V VAIN (4) Conversion voltage range(2) -0 - VREF+ V RAIN External input impedance -- - 50 kΩ CADC Internal sample and hold capacitor -- 5 - pF tSTAB Power-up time - 1 Conversion cycle tCAL Calibration time fADC = 64 MHz 1.8125 µs - 116 1 / fADC |
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