10 Layout

10.1 Layout Guidelines

The following guidelines should be followed when designing the layout:

1. Decoupling capacitors should be placed as close to the VCC pins as possible. Placing the decoupling

capacitors directly underneath the device is recommended if the board design permits.

2. High-speed differential signals TXnP/TXnN and RXnP/RXnN should be tightly coupled, skew matched, and

impedance controlled.

3. Vias should be avoided when possible on the high-speed differential signals. When vias must be used, take

care to minimize the via stub, either by transitioning through most/all layers or by back drilling.

4. GND relief can be used (but is not required) beneath the high-speed differential signal pads to improve signal

integrity by counteracting the pad capacitance.

5. GND vias should be placed directly beneath the device connecting the GND plane attached to the device to

the GND planes on other layers. This has the added benefit of improving thermal conductivity from the device

to the board.

DS160PR412

SNLS685 – DECEMBER 2020

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