| 전자부품 데이터시트 검색엔진 |
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TSZ181ILT 데이터시트(PDF) 17 Page - STMicroelectronics |
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TSZ181ILT 데이터시트(HTML) 17 Page - STMicroelectronics |
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17 / 43 page ![]() 5 Application information 5.1 Operation theory The TSZ18x is a high precision CMOS device. It can achieve a low offset drift and no 1/f noise thanks to its chopper architecture. Chopper-stabilized amps constantly correct low-frequency errors across the inputs of the amplifier. Chopper-stabilized amplifiers can be explained with respect to: • Time domain • Frequency domain 5.1.1 Time domain The basis of the chopper amplifier is realized in two steps. These steps are synchronized thanks to a clock running at 2.4 MHz. Figure 46. Block diagram in the time domain (step 1) Vout A1(f) Filter A2(f) V V Chop 1 Chop 2 inp inn Figure 47. Block diagram in the time domain (step 2) Vout A1(f) Filter A2 (f) V V Chop 1 Chop 2 inp inn Figure 46. Block diagram in the time domain (step 1) shows step 1, the first clock cycle, where Vio is amplified in the normal way. Figure 47. Block diagram in the time domain (step 2) shows step 2, the second clock cycle, where Chop1 and Chop2 swap paths. At this time, the Vio is amplified in a reverse way as compared to step 1. At the end of these two steps, the average Vio is close to zero. The A2(f) amplifier has a small impact on the Vio because the Vio is expressed as the input offset and is consequently divided by A1(f). In the time domain, the offset part of the output signal before filtering is shown in Figure 48. Vio cancellation principle. TSZ181, TSZ182 Application information DS11863 - Rev 5 page 17/43 |
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