전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

5000 데이터시트(PDF) 13 Page - Renesas Technology Corp

부품명 5000
상세설명  High Reliability SP2T RF Switch 50 MHz to 8000 MHz
PDF  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

5000 데이터시트(HTML) 13 Page - Renesas Technology Corp

Back Button 5000 Datasheet HTML 9Page - Renesas Technology Corp 5000 Datasheet HTML 10Page - Renesas Technology Corp 5000 Datasheet HTML 11Page - Renesas Technology Corp 5000 Datasheet HTML 12Page - Renesas Technology Corp 5000 Datasheet HTML 13Page - Renesas Technology Corp 5000 Datasheet HTML 14Page - Renesas Technology Corp 5000 Datasheet HTML 15Page - Renesas Technology Corp 5000 Datasheet HTML 16Page - Renesas Technology Corp 5000 Datasheet HTML 17Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 21 page
background image
F2932
F2932, Rev 1 05/12/2016
13
High Reliability SP2T RF Switch
PIN DIAGRAM
VDD
1
4
3
2
RFC
GND
GND
VCTL
E.P.
12
9
10
11
RF1
GND
RF2
50Ω
50Ω
PIN DESCRIPTION
PIN
NAME
FUNCTION
1
VDD
Power Supply. Bypass to GND with capacitors shown in the
Typical Application Circuit as close as possible to pin.
2
VCTL
Controls the selected path when EN is low. Is disabled when EN
is logic high. See Table 1.
3
RFC
RF Common Port. Matched to 50 Ω when one of the 2 RF ports
is selected. If this pin is not 0 V DC, then an external coupling
capacitor must be used.
4, 6, 7, 8, 10,
11, 13, 14, 15,
16
GND
Ground. Also, internally connected to the ground paddle. Ground
this pin as close to the device as possible.
5
EN
EN as a logic low allows VCTL to control the selected switch
path. With EN set to logic high puts the part in all paths off state
and disables the control of VCTL. See Table 1.
9
RF1
RF1 Port. Matched to 50 Ω. If this pin is not 0 V DC, then an
external coupling capacitor must be used.
12
RF2
RF2 Port. Matched to 50 Ω. If this pin is not 0 V DC, then an
external coupling capacitor must be used.
17
— EP
Exposed Pad. Internally connected to GND. Solder this exposed
pad to a PCB pad that uses multiple ground vias to provide heat
transfer out of the device and into the PCB ground planes. These
multiple ground vias are also required to achieve the specified
RF performance.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com