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INA84C641 데이터시트(PDF) 2 Page - Integral Corp. |
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INA84C641 데이터시트(HTML) 2 Page - Integral Corp. |
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2 / 2 page ![]() INA84C641 2 PIN DESCRIPTION PIN SYMBOL DESCRIPTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 DP0.0/Tdac DP0.1/PWM1 DP0.2/PWM2 DP0.3/PWM3 DP0.4/PWM4 DP0.5/PWM5 P1.0/VHF1 P1.1/VHF3 P1.7/AFC P1.2/VHF P1.3/VTR P1.4/AV P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7/Mdstr VSS DP1.6/VOW1 DP1.5/VOW2 VOW3 Fbl HSYNC VSYNC DOSC1 DOSC2 Test Xlat 1 Xlat 2 Reset N\ IDENT Int/Rmot DP1.3/Sndo DP1.2/Effect DP1.1/P/S DP0.7/SCL DP0.6/SDA DP1.0/Stdby VDD Derivative Port 0: quasi-bidirectional I/O line or 14-bit DAC PWM Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM Derivative Port 1: quasi-bidirectional I/O line or 6-bit DAC PWM Port 1: quasi-bidirectional I/O lines Port 1: quasi-bidirectional I/O lines Derivative Port 1: quasi-bidirectional I/O line or comparator input with 3-bit DAC Port 1: quasi-bidirectional I/O lines Port 1: quasi-bidirectional I/O lines Port 1: quasi-bidirectional I/O lines Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Port 0: quasi-bidirectional I/O port Ground Derivative Port 1: quasi-bidirectional I/O lines or character video output Derivative Port 1: quasi-bidirectional I/O lines or character video output Character video output of OSD Blanking output Horizontal synchronous signal input Vertical synchronous signal input Connection to LC oscillator of OSD clock Connection to LC oscillator of OSD clock Control input for testing and emulation mode. Ground for normal operation Oscillator output or input terminal for system clock Oscillator output or input terminal for system clock Initialise input, active LOW Direct testable pin and event counter input External interrupt or direct testable Derivative Port 1: quasi-bidirectional I/O lines Derivative Port 1: quasi-bidirectional I/O lines Derivative Port 1: quasi-bidirectional I/O lines Derivative open drain I/O port or I 2C-bus clock line Derivative open drain I/O port or I 2C-bus data line Derivative Port 1: quasi-bidirectional I/O lines Power supply |
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