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TMP47P201 데이터시트(PDF) 24 Page - Toshiba Semiconductor |
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TMP47P201 데이터시트(HTML) 24 Page - Toshiba Semiconductor |
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24 / 32 page ![]() 24/32 TOSHIBA CORPORATION TMP47C101/201 3.3 Timer/Counters (TC1,TC2) The 47C101/201 contain two 12-bit timer/counters (TC1, TC2). RAM addresses are assigned to the count register in unit of 4 bits, permitting the initial value setting and counter reading through the RAM manipulation instruction. When the timer/ counter is not used, the mode selection may be set to “stopped” to use the RAM at the address corresponding to the timer/counter for storing the ordinary user-processed data. Figure 3-16. Count Registers of the Timer/Counters (TC1, TC2) 3.3.1 Functions of Timer/Counters The timer/counters provide the following functions: Event counter Programmable timer Pulse width measurement 3.3.2 Control of Timer/Counters The timer/counters are controlled by the command registers. The command register is accessed as port address OP1C for TC1 and port address OP1D for TC2. These registers are ini- tialized to “0” during reset. Figure 3-7. Timer/Counter Control Command Registers |
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