PD69201 datasheet(17/29 Pages) MICROCHIP

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Pin Descriptions

The following figure and table describe the pins of the PD69201 device.

Figure 3-1. PD69201 Pinout

Table 3-1. Pin Descriptions

Number

Name

Type

Description

PAD

GND-power

Exposed PAD: Connect to analog ground. Maximum the

Ground plane (especially on the bottom layer) for

optimal thermal performance. Use recommended

footprint. (See PD69201 Layout Design Guidelines).

IREF

Analog input

Reference resistor pin. Connect a 240 kΩ 1% resistor to

AGND.

Disable_Port

Analog I/O

Enable/disable port pin: When applying 5 V—port

enable, 0 V—port disable.

Reserved

N/A

Reserved pin. Do not connect externally.

MODE/SDA

Analog Input/DIO

Dual purpose: Mode select pin (by connecting external

resistor to ground). I2C SDA signal for PD69201.

Power_set/SCL

Analog Input/DI

Dual purpose: Mode select pin (by connecting external

resistor to ground). I2C SDA signal for PD69201.

VAUX5

Power

Regulated 5 V output voltage source; Connect to

filtering capacitors (4.7 uF + 100 nF).

DRV_VAUX5

See section Auxiliary 5 VDC Power Options.

LED

Analog I/O

Dual purpose: Current sink for controlling external LED.

I2C address setting for PD69201 (low sets to address

0x20; high sets to address 0x21).

Note: When an LED is connected to the pin, it sets to

address 0x21.

VMAIN

Power

Main high-voltage supply voltage. A low ESR 100 nF (or

higher) bypass capacitor, connected to AGND, should

be placed as close as possible to this pin through low-

resistance traces.

VPORT_NEG

Analog I/O

Negative port output.

PD69201

Pin Descriptions

Datasheet

DS00003454D-page 17

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