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STB70NF03L 데이터시트(PDF) 1 Page - STMicroelectronics |
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STB70NF03L 데이터시트(HTML) 1 Page - STMicroelectronics |
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1 / 11 page ![]() 1/11 June 2003 NEW DATASHEET ACCORDING TO PCN DSG/CT/2C13 MARKING: P70NF03L@ B70NF03L@ STB70NF03L STP70NF03L STB70NF03L-1 N-CHANNEL 30V - 0.0075 Ω - 70A D²PAK/I²PAK/TO-220 LOW GATE CHARGE STripFET™ II POWER MOSFET s TYPICAL RDS(on) = 0.0075 Ω @ 10 V s OPTIMAL RDS(on) x Qg TRADE-OFF @ 5 V s CONDUCTION LOSSES REDUCED s SWITCHING LOSSES REDUCED s SURFACE-MOUNTING D2PAK (TO-263) POWER PACKAGE IN TUBE (NO SUFFIX) OR IN TAPE & REEL (SUFFIX “T4”) DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronis unique "Sin- gle Feature Size™" strip-based process. The re- sulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high effi- ciency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS TYPE VDSS RDS(on) ID STB70NF03L STP70NF03L STB70NF03L-1 30 V 30 V 30 V < 0.0095 Ω < 0.0095 Ω < 0.0095 Ω 70 A 70 A 70 A 1 2 3 1 3 D2PAK TO-263 (Suffix “T4”) TO-220 1 2 3 I2PAK TO-262 ABSOLUTE MAXIMUM RATINGS ( •) Current limited by the package (1) ISD ≤70A, di/dt ≤350A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX (2) Starting Tj = 25 oC, ID = 35A, VDD = 25V Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 30 V VDGR Drain-gate Voltage (RGS = 20 kΩ) 30 V VGS Gate- source Voltage ± 18 V ID(#) Drain Current (continuous) at TC = 25°C 70 A ID Drain Current (continuous) at TC = 100°C 50 A IDM(•) Drain Current (pulsed) 280 A Ptot Total Dissipation at TC = 25°C 100 W Derating Factor 0.67 W/°C dv/dt (1) Peak Diode Recovery voltage slope 5.5 V/ns EAS (2) Single Pulse Avalanche Energy 500 mJ Tstg Storage Temperature -55 to 175 °C Tj Operating Junction Temperature INTERNAL SCHEMATIC DIAGRAM |
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