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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AXM0F243 데이터시트(PDF) 4 Page - ON Semiconductor |
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AXM0F243 데이터시트(HTML) 4 Page - ON Semiconductor |
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4 / 53 page  AXM0F243 www.onsemi.com 4 BLOCK DIAGRAM Figure 1. Functional Block Diagram of the AXM0F243 Peripherals CPU Subsystem System Interconnect (Single Layer AHB) I/O Subsystem Peripheral Interconnect (MMIO) PCLK SWD/TC NVIC, IRQMUX Cortex M0+ 48 MHz FAST MUL FLASH 64 KB Read Accelerator SPCIF SRAM 8 KB SRAM Controller 19x GPIOs, LCD DeepSleep Active/ Sleep Power Modes System Resources Lite Power Clock Reset Clock Control IMO Sleep Control REF POR Reset Control WIC XRES WDT ILO PWRSYS SAR ADC (12−bit) x1 CTBm x1 2x Opamp Programmable Analog High Speed I/O Matrix & 2 x Programmable I/O AXM0F243 ANTP ANTN IF Filter & AGC PGAs AGC Crystal Oscillator typ. 16MHz Communication Controller & Radio Interface Controller LNA Divider ADC Digital IF Channel Filter PA diff De- modulator Modulator Mixer CLK16P CLK16N RSSI Radio configuration VDDA Voltage Regulator POR, references RF Frequency Generation Subsystem PA se F OUT ANTP1 L1 L2 FILT VDDD F XTAL low power oscillator 640 Hz/ 10 kHz Wake on Radio SYSCLK VSSA VSSD XRES VCCD Voltage Regulator VDDD |
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