ADRF5547

Data Sheet

Rev. A | Page 6 of 15

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADRF5547

TOP VIEW

(Not to Scale)

NOTES

1. NIC = NOT INTERNALLY CONNECTED. IT IS RECOMMENDED

TO CONNECT NIC TO THE RF GROUND OF THE PCB.

2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED

TO RF OR DC GROUND.

1

GND

2

GND

3

ANT-ChA

4

GND

5

SWCTRL-ChAB

6

SWVDD-ChAB

7

GND

8

ANT-ChB

9

GND

10

GND

23 GND

24 BP-ChB

25 NIC

26 PD-ChAB

27 BP-ChA

28 GND

29 RxOUT-ChA

30 GND

22 RxOUT-ChB

21 GND

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 4, 7, 9 to 11, 14 to 16, 21, 23, 28, 30, 35 to 37, 40

GND

Ground. See Figure 3 for the interface schematic.

3

ANT-ChA

RF Input to Channel A.

5

SWCTRL-ChAB

Control Voltage for Switches on Channel A and Channel B. See

Figure 7 for the interface schematic.

6

SWVDD-ChAB

Supply Voltage for Switches on Channel A and Channel B. See

Figure 7 for the interface schematic.

8

ANT-ChB

RF Input to Channel B.

12

TERM-ChB

Termination Output. This pin is the transmitter path for Channel B.

13, 18, 19, 25, 32, 33, 38

NIC

Not Internally Connected. It is recommended to connect NIC to the

RF ground of the PCB.

17

VDD1-ChB

Supply Voltage for Stage 1 LNA on Channel B. See Figure 5 for the

interface schematic.

20

VDD2-ChB

Supply Voltage for Stage 2 LNA on Channel B. See Figure 5 for the

interface schematic.

22

RxOUT-ChB

RF Output. This pin is the receiver path for Channel B. See Figure 4

for the interface schematic.

24

BP-ChB

Bypass Second Stage LNA of Channel B. See Figure 6 for the

interface schematic.

26

PD-ChAB

Power-Down All Stages of LNA for Channel A and Channel B. See

Figure 6 for the Interface schematic.

27

BP-ChA

Bypass Second Stage LNA of Channel A. See Figure 6 for the

interface schematic.

29

RxOUT-ChA

RF Output. This pin is the receiver path for Channel A. See Figure 4 for

the interface schematic.

31

VDD2-ChA

Supply Voltage for Stage 2 LNA on Channel A. See Figure 5 for the

interface schematic.

34

VDD1-ChA

Supply Voltage for Stage 1 LNA on Channel A. See Figure 5 for the

interface schematic.

39

TERM-ChA

Termination Output. This pin is the transmitter path for Channel A.

EPAD

Exposed Pad. The exposed pad must be connected to RF or dc ground.