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FTS64K 데이터시트(PDF) 23 Page - Freescale Semiconductor, Inc |
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FTS64K 데이터시트(HTML) 23 Page - Freescale Semiconductor, Inc |
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23 / 44 page ![]() FTS64K Block User Guide — Version V01.00 23 The FPROT register is readable in user and special modes. Bit NV6 is not writable. FPOPEN, FPHDIS and FPLDIS bits in the FPROT register can only be written to the protected state (i.e. 0). FPLS[1:0] can be written anytime until bit FPLDIS is cleared. FPHS[1:0] bits can be written anytime until bit FPHDIS is cleared. If the FPOPEN bit is cleared, then the state of the FPHDIS, FPHS[1:0], FPLDIS and FPLS[1:0] bits is irrelevant. The FPROT register is loaded from Flash address $FF0D during reset. To change the Flash protection that will be loaded on reset, the upper sector of Flash must be unprotected, then the Flash Protect/Security byte located as described in Table 3-1 must be written to. A protected Flash sector is disabled by the bits FPHDIS and FPLDIS while the size of the protected sector is defined by FPHS[1:0] and FPLS[1:0] in the FPROT register. Trying to alter any of the protected areas will result in a protect violation error and bit PVIOL will be set in the Flash Status Register FSTAT. A mass erase of the whole Flash block is only possible when protection is fully disabled by setting FPLDIS and FPHDIS bits. FPOPEN — Opens the Flash for program or erase. 1 = The Flash sectors not protected are enabled for program or erase. 0 = The whole Flash array is protected. In this case the FPHDIS, FPHS[1:0], FPLDIS and FPLS[1:0] bits within the protection register are don’t care. FPHDIS — Flash Protection Higher address range Disable. The FPHDIS bit determines whether there is a protected area in the higher space of the Flash address map. 1 = Protection disabled. 0 = Protection enabled. FPHS[1:0] — Flash Protection Higher Address Size. The FPHS[1:0] bits determine the size of the protected sector. Refer to Table 3-5. FPLDIS — Flash Protection Lower address range Disable. The FPLDIS bit determines whether there is a protected sector in the lower space of the Flash address map. 1 = Protection disabled. 0 = Protection enabled. FPLS[1:0] — Flash Protection Lower Address Size. The FPLS[1:0] bits determine the size of the protected sector. Refer to Table 3-6. Table 3-5 Flash Higher Address Range Protection FPHS Protected Address Range Protected Size 00 see Table 3-2 2K bytes 01 4K 10 8K 11 16K Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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