MCP47FVB02 datasheet(61/92 Pages) MICROCHIP

61 / 92 page

 2015 Microchip Technology Inc.

DS20005405A-page 61

MCP47FVBXX

8.0

TYPICAL APPLICATIONS

The MCP47FVBXX family of devices are general pur-

pose, single/dual-channel voltage output DACs for vari-

ous applications where a precision operation with

low-power is needed.

Applications generally suited for the devices are:

• Set Point or Offset Trimming

• Sensor Calibration

• Portable Instrumentation (Battery-Powered)

• Motor Control

8.1

Connecting to I2C BUS using

Pull-Up Resistors

The SCL and SDA pins of the MCP47FVBXX devices

are open-drain configurations. These pins require a

pull-up resistor, as shown in Figure 8-2.

The pull-up resistor values (R1 and R2) for SCL and

SDA pins depend on the operating speed (standard,

fast and high-speed) and loading capacitance of the I2C

bus line. A higher value of the pull-up resistor consumes

less power, but increases the signal transition time

(higher RC time constant) on the bus line. Therefore, it

can limit the bus operating speed. The lower resistor

value, on the other hand, consumes higher power, but

allows higher operating speed. If the bus line has higher

capacitance due to long metal traces or multiple device

connections to the bus line, a smaller pull-up resistor is

needed to compensate the long RC time constant. The

pull-up resistor is typically chosen between 1 k

 and

10 k

ranges for Standard and Fast modes, and less

than 1 k

for High-Speed mode.

8.1.1

DEVICE CONNECTION TEST

The user can test the presence of the device on the I2C

bus line using a simple I2C command. This test can be

achieved by checking an acknowledge response from

the device after sending a Read or Write command.

Figure 8-1 shows an example with a Read command.

The steps are:

Set the R/W bit “High” in the device’s address byte.

Check the ACK bit of the address byte.

If the device acknowledges (ACK = 0) the

command, then the device is connected.

Otherwise, it is not connected.

Send Stop bit.

FIGURE 8-1:

I2C Bus Connection Test.

12 3 4 5 6 7 8 9

SCL

SDA

A2 A1 A0 1

Start

Bit

Address Byte

Address bits

R/W

Stop

Bit

Device

Response

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