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MCP47FVB02 데이터시트(PDF) 45 Page - Microchip Technology

부품명 MCP47FVB02
상세설명  8-/10-/12-Bit Single/Dual Voltage Output Nonvolatile Digital-to-Analog Converters with SPI Interface
PDF  92 Pages
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MCP47FVB02 데이터시트(HTML) 45 Page - Microchip Technology

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DS20005429B-page 45
MCP48FEBXX
5.3.2
OUTPUT VOLTAGE
The volatile DAC Register values, along with the
device’s configuration bits, control the analog VOUT
voltage. The volatile DAC Register’s value is unsigned
binary. The formula for the output voltage is given in
Equation 5-2. Table 5-3 shows examples of volatile
DAC register values and the corresponding theoretical
VOUT voltage for the MCP48FEBXX devices.
EQUATION 5-2:
CALCULATING OUTPUT
VOLTAGE (VOUT)
The following events update the DAC register value
and therefore the analog voltage output (VOUT):
• Power-on Reset
• Brown-out Reset
• Write command
The VOUT voltage will start driving to the new value
after the event has occurred.
5.3.3
STEP VOLTAGE (VS)
The Step Voltage is dependent on the device resolution
and the calculated output voltage range. One LSb is
defined as the ideal voltage difference between two
successive codes. The step voltage can easily be
calculated by using Equation 5-3 (DAC Register Value
is equal to 1). Theoretical step voltages are shown in
Table 5-2 for several VREF voltages.
EQUATION 5-3:
VS CALCULATION
TABLE 5-2:
THEORETICAL STEP
VOLTAGE (VS)
(1)
Note:
When Gain = 2 (VRL = VREF) and
if VREF > VDD / 2, the VOUT voltage will be
limited to VDD. So if VREF = VDD, then the
VOUT voltage will not change for volatile
DAC Register values mid-scale and greater,
since the op amp is at full-scale output.
Where:
# Resistors in R-Ladder = 4096 (MCP48FEB2X)
1024 (MCP48FEB1X)
256 (MCP48FEB0X)
V
OUT
V
RL
DAC Register Value
# Resistor in Resistor Ladder
----------------------------------------------------------------------Gain
=
VREF
5.0
2.7
1.8
1.5
1.0
VS
1.22 mV 659 uV
439 uV
366 uV
244 uV 12-bit
4.88 mV 2.64 mV 1.76 mV 1.46 mV 977 uV 10-bit
19.5 mV 10.5 mV 7.03 mV 5.86 mV 3.91 mV 8-bit
Note 1:
When Gain = 1x, VFS = VRL, and VZS = 0V.
Where:
# Resistors in R-Ladder = 4096 (12-bit)
1024 (10-bit)
256 (8-bit)
V
S
V
RL
# Resistor in Resistor Ladder
----------------------------------------------------------------------Gain
=



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