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LPC82X 데이터시트(PDF) 39 Page - NXP Semiconductors |
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LPC82X 데이터시트(HTML) 39 Page - NXP Semiconductors |
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39 / 83 page ![]() LPC82x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2021. All rights reserved. Product data sheet Rev. 1.4 — 19 March 2021 39 of 82 NXP Semiconductors LPC82x 32-bit ARM Cortex-M0+ microcontroller 11.4 Power consumption Power measurements in Active, Sleep, Deep-sleep, and Power-down modes were performed under the following conditions: • Configure all pins as GPIO with pull-up resistor disabled in the IOCON block. • Configure GPIO pins as outputs using the GPIO DIR register. • Write 1 to the GPIO CLR register to drive the outputs LOW. Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL =0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; low-current mode. 1 MHz - 6 MHz: external clock; IRC, PLL disabled. 12 MHz: IRC enabled; PLL disabled. 24 MHz: IRC enabled; PLL enabled. 30 MHz: system oscillator enabled; PLL enabled. Fig 13. Active mode: Typical supply current IDD versus supply voltage VDD aaa-013992 1.8 2.4 3 3.6 0 1 2 3 4 VDD (V) IDD DD IDD (mA) (mA) (mA) 30 MHz 30 MHz 30 MHz 24 MHz 24 MHz 24 MHz 12 MHz 12 MHz 12 MHz 6 MHz 6 MHz 6 MHz 4 MHz 4 MHz 4 MHz 3 MHz 3 MHz 3 MHz 2 MHz 2 MHz 2 MHz 1 MHz 1 MHz 1 MHz |
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