ACE25AC400G

SPI NOR FLASH

VER 1.3

5

Status Register

S7

S6

S5

S4

S3

S2

S1

S0

Reserved

Reserved

Reserved

BP2

BP1

BP0

WEL

WIP

The status and control bits of the Status Register are as follows:

WIP bit.

The Write In Progress (WIP) bit indicates whether the memory is busy in program/erase/write status

register progress. When WIP bit sets to 1, the device is busy in program/erase/write status register

progress. When WIP bit sets 0, the device is not in program, erase or write status register.

WEL bit.

The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch. When set to 1,

the internal Write Enable Latch is set. When set to 0, the internal Write Enable Latch is reset and no Write

Status Register, Program or Erase command is accepted.

BP2, BP1, BP0 bits.

The Block Protect (BP2, BP1, and BP0) bits are non-volatile. They define the size of the area to be

software protected against Program and Erase commands. These bits are written with the Write Status

Register (WRSR) command. When the Block Protect (BP2, BP1, and BP0) bits are set to 1, the relevant

memory area (as defined in Table1) becomes protected against Page Program (PP), Sector Erase (SE)

and Block Erase (BE) commands. Chip Erase command will be ignored if one or more of the Block

Protect (BP2, BP1, and BP0) bits are 1.