MPC755 RISC Microprocessor Hardware Specifications Addendum for the XPC7n5BxxnnnLD Series, Rev. 2.1

Freescale Semiconductor

3

General Parameters

all device revisions prior to Rev. 2.8 (Rev. E), including all part numbers described herein. Note that the

MPC745 does not provide an L2 interface.

Table 3 provides the recommended operating conditions for all device revisions prior to Rev. 2.8 (Rev. E),

including all part numbers described herein.

Table 6 provides the DC electrical specifications for all device revisions prior to Rev. 2.8 (Rev. E),

including all part numbers described herein.

Table 2. Input Threshold Voltage Setting

BVSEL Signal

L2VSEL Signal

Processor Bus

Interface Voltage

L2 Bus

Interface Voltage

0

0

1.8 V or 2.0 V

1.8 V or 2.0 V

0

1

1.8 V or 2.0 V

3.3 V

1

0

3.3 V

1.8 V or 2.0 V

1

1

3.3 V

3.3 V

Table 3. Recommended Operating Conditions

Characteristic

Symbol

Recommended Value

Unit

Core supply voltage

2.0 ±100 mV

V

PLL supply voltage

2.0 ±100 mV

V

L2 DLL supply voltage

2.0 ±100 mV

V

Processor bus supply voltage

BVSEL = 0

1.8 ±100 mV or

2.0 ±100 mV

V

BVSEL = 1

3.3 ±165 mV

V

L2 bus supply voltage

L2VSEL = 0

1.8 ±100 mV or

2.0 ±100 mV

V

L2VSEL = 1

3.3 ±165 mV

V

Note: These are the recommended and tested operating conditions. Proper device operation outside of these conditions is not

guaranteed.

Table 6. DC Electrical Specifications

At recommended operating conditions (see Table 3)

Characteristic

Nominal

Bus

Symbol

Min

Max

Unit

Notes

Input high voltage (all inputs except

SYSCLK)

1.8/2.0

0.65

× (L2)OV

DD

V

2,3

3.3

2.0

V

2,3

Input low voltage (all inputs except

SYSCLK)

1.8/2.0

–0.3

0.35

× (L2)OV

DD

V2

3.3

–0.3

0.8

V