DC and AC parameters

M25P128

34/41

Rev. 1

Table 14.

AC Characteristics

Test conditions specified in Table 10 and Table 11

Symbol

Alt.

Parameter

Min.

Typ.

Max.

Unit

Clock Frequency for the following instructions: FAST_READ,

PP, SE, BE, WREN, WRDI, RDID, RDSR, WRSR

D.C.

50

MHz

Clock Frequency for READ instructions

D.C.

20

MHz

(1)

Clock High Time

9

ns

(1)

Clock Low Time

9

ns

(2)

0.1

V/ns

(2)

Clock Fall Time(3) (peak to peak)

0.1

V/ns

S Active Setup Time (relative to C)

5

ns

S Not Active Hold Time (relative to C)

5

ns

Data In Setup Time

2

ns

Data In Hold Time

5

ns

S Active Hold Time (relative to C)

5

ns

S Not Active Setup Time (relative to C)

5

ns

S Deselect Time

100

ns

(2)

Output Disable Time

8

ns

Clock Low to Output Valid

8

ns

Output Hold Time

0

ns

HOLD Setup Time (relative to C)

5

ns

HOLD Hold Time (relative to C)

5

ns

HOLD Setup Time (relative to C)

5

ns

HOLD Hold Time (relative to C)

5

ns

(2)

HOLD to Output Low-Z

8

ns

(2)

HOLD to Output High-Z

8

ns

(4)

Write Protect Setup Time

20

ns

(4)

Write Protect Hold Time

100

ns

Write Status Register Cycle Time

5

15

ms

(5)

Page Program Cycle Time (256 Bytes)

2.5

7ms

Page Program Cycle Time (n Bytes)

2.5

Sector Erase Cycle Time

2

6

s

Bulk Erase Cycle Time

105

250

s

1.

2.

Value is guaranteed by characterization, not 100% tested in production.

3.

Expressed as a slew-rate.

4.

Only applicable as a constraint for WRSR instruction when SRWD is set to 1.

5.

Due to the Multi Level Cell technology, when using the Page Program (PP) instruction to program consecutive Bytes,

optimized timings are obtained with one sequence including all the Bytes versus several sequences of only a few Bytes. If

only a single byte is programmed, the estimated programming time is close to the time needed to program a full page of

256 Bytes. Therefore, it is highly recommended to use the Page Program (PP) instruction with a sequence of 256

consecutive Bytes. (1

≤n ≤256)