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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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SC3200 데이터시트(PDF) 381 Page - Advanced Micro Devices |
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SC3200 데이터시트(HTML) 381 Page - Advanced Micro Devices |
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381 / 447 page  AMD Geode™ SC3200 Processor Data Book 381 Electrical Specifications Revision 5.1 9.3.1 Memory Controller Interface The minimum input setup and hold times described in Figure 9-3 (legend C and D) define the smallest acceptable sampling window during which a synchronous input signal must be stable to ensure correct operation. Figure 9-3. Memory Controller Drive Level and Measurement Points SDCLK_OUT VOH VREF VREF VREF C Valid Output n+1 A B Valid Output n OUTPUTS INPUTS VIH VIL VOL Min Max Legend: A = Maximum Output Delay B = Minimum Output Delay C = Minimum Input Setup D = Minimum Input Hold D tx VOH VOL VOLD VOHD SDCLK_IN VIH VREF VIL tx VILD VIHD SDCLK[3:0] |
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