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FUNCTIONAL BLOCK DIAGRAM

12-Bit ADC

D[11:0]

Sample

and Hold

CLK

DGND

AGND

OVRNG

CON0

Timing Circuitry

REFT REFB

Internal

Reference

Circuit

CON1

3-State

Output

Buffers

EXTREF

Configuration

Control

Circuit

AIN+

AIN−

OE

THS1215

SLAS292A – MARCH 2001 – REVISED MARCH 2004

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated

circuits be handled with appropriate precautions. Failure to observe proper handling and installation

procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision

integrated circuits may be more susceptible to damage because very small parametric changes could

cause the device not to meet its published specifications.

ORDERING INFORMATION

PRODUCT

PACKAGE-

PACKAGE

SPECIFIED

PACKAGE

ORDERING

TRANSPORT

LEAD

TEMPERATURE

MARKING

NUMBER

MEDIA, QUANTITY

RANGE

THS1215

TSSOP-28

PW

0

°C TO 70°C

TH1215

THS1215 CPW

Tube, 50

THS1215

TSSOP-28

PW

0

°C TO 70°C

TH1215

THS1215 CPWR

Tape and reel, 2000

THS1215

TSSOP-28

PW

–40

°C TO 85°C

TJ1215

THS1215 IPW

Tube, 50

THS1215

TSSOP-28

PW

–40

°C TO 85°C

TJ1215

THS1215 IPWR

Tape and reel, 2000

THS1215

SOP-28

DW

0

°C TO 70°C

TH1215

THS1215 CDW

Tube, 20

THS1215

SOP-28

DW

0

°C TO 70°C

TH1215

THS1215 CDWR

Tape and reel, 1000

THS1215

SOP-28

DW

–40

°C TO 85°C

TJ1215

THS1215 IDW

Tube, 20

THS1215

SOP-28

DW

–40

°C TO 85°C

TJ1215

THS1215 IDWR

Tape and reel, 1000

(1)

For the most current specifications and package information refer to our Web site at www.ti.com.

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