| 전자부품 데이터시트 검색엔진 |
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PLL650-07SC-R 데이터시트(PDF) 3 Page - PhaseLink Corporation |
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PLL650-07SC-R 데이터시트(HTML) 3 Page - PhaseLink Corporation |
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3 / 4 page ![]() PLL650-07 LOW COST Network LAN Clock SOURCE 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 3 3. DC Specifications PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Operating Voltage VDD 2.97 3.63 V Input High Voltage VIH VDD /2 V Input Low Voltage VIL VDD /2 VDD /2 - 1 V Input High Voltage VIH For all normal input 2 V Input Low Voltage VIL For all normal input 0.8 V Output High Voltage VOH IOH = -25mA 2.4 V Output Low Voltage VOL IOL = 25mA 0.4 V Output High Voltage At CMOS Level VOH IOH = -8mA VDD -0.4 V Operating Supply Current IDD No Load 35 mA Short-circuit Current IS ±50 mA Nominal output current Iout CMOS output level 35 40 mA Nominal output current Iout TTL output level 20 25 mA |
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