PLL620-21DM datasheet(3/7 Pages) PLL

3 / 7 page

Preliminary

PLL620-21

Low Phase Noise XO (for HF Fund. and 3rd O.T.)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

www.phaselink.com Rev 07/15/05 Page 3

3. General Electrical Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Supply Current (Loaded Outputs)

IDD

PECL/LVDS

100/80

Operating Voltage

VDD

3.13

3.47

Output Clock Duty Cycle

@ 1.25V (LVDS)

@ Vdd – 1.3V (PECL)

Short Circuit Current

±50

4. Jitter specifications

PARAMETERS

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Period jitter RMS at 155MHz

2.5

Period jitter peak-to-peak at 155MHz

With capacitive decoupling

between VDD and GND.

Accumulated jitter RMS at 155MHz

Accumulated jitter peak-to-peak at 155MHz

With capacitive decoupling

between VDD and GND. Over

1,000,000 cycles.

Integrated jitter RMS at 155MHz

Integrated 12 kHz to 20 MHz

0.3

Note: Higher Q factor of 3rd overtone crystals will result in even better jitter performance.

5. Phase noise specifications

PARAMETERS

FREQUENCY

@10Hz

@100Hz

@1kHz

@10kHz @100kHz

UNITS

Phase Noise vs. carrier

with fund. crystal.

155.52MHz

-80

-110

-125

-143

-145

dBc/Hz

Note: Higher Q factor of 3rd overtone crystals will result in even better phase noise performance.

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