Preliminary

PLL601-03

Low Phase Noise PLL Clock Multiplier

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 06/15/01 Page 4

3. DC Specification

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Operating Voltage

VDD

3.135

3.465

V

Input High Voltage

2

V

Input Low Voltage

0.8

V

Input High Voltage

For XIN pin

(VDD/2)

+ 1

VDD/2

V

Input Low Voltage

For XIN pin

VDD/2

(VDD/2)

− 1

V

Output High Voltage

2.4

V

Output Low Voltage

0.4

V

Output High Voltage At

CMOS Level

VDD-0.4

V

Operating Supply Current

No Load

35

mA

Short-circuit Current

±120

mA

Input Capacitance

OE, Select Pins

5

pF

4. Crystal Specifications

PARAMETERS

SYMBOL

CONDITIONS

MIN.

TYP.

MAX.

UNITS

Crystal Resonator Frequency

Parallel Fundamental Mode

10

30

MHz

Crystal Loading Capacitance

Rating

15

pF