| 전자부품 데이터시트 검색엔진 |
|
PLL702-03SC 데이터시트(PDF) 6 Page - PhaseLink Corporation |
|
|
|||||||||||||||||||||||||||||
PLL702-03SC 데이터시트(HTML) 6 Page - PhaseLink Corporation |
|
6 / 7 page ![]() Preliminary PLL702-03 Low EMI Peripheral Clock Generator for Notebook PCs 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 Rev 10/06/02 Page 6 3. DC Specification PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Operating Voltage VDD Nominal voltage 3.3V 2.97 3.63 V Input High Voltage VIH VDD/2 V Input Low Voltage VIL VDD/2 VDD/2 - 1 V Input High Voltage VIH For all Tri-level input VDD-0.5 V Input Low Voltage VIL For all Tri-level input 0.5 V Input High Voltage VIH For all normal input 2 V Input Low Voltage VIL For all normal input 0.8 V IOH = -30mA (normal drive) Output High Voltage VOH IOH = -60mA (double drive) 2.4 V IOL = 30mA (normal drive) Output Low Voltage VOL IOH = -60mA (double drive) 0.4 V Output High Voltage At CMOS Level VOH IOH = -8mA VDD-0.4 V Normal drive strength 30 Nominal Output Current IOUT Double drive strength 60 mA Operating Supply Current IDD No Load 35 mA Short-circuit Current IS ±100 mA |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |