Clock Synthesizer for Portable Systems

MDS 1493-17 A

2

Revision 101005

Integr ated Circuit System s

ICS1493-17

PRELIMINAR Y INFORMA T ION

Pin Assignment

Output Enable Table

Note: OE pin has an internal pull-down resistor.

Pin Descriptions

1

GND

20-pin QFN

48M

VDDO

OE

VDD

GND

VDD

37M

VDDO

22/24M

6

11

16

OE

Clock Output State

0

Normal Operation

1

Hi-Z

Pin

Number

Pin

Name

Pin

Type

Pin Description

1

GND

Power

Connect to ground.

2

48M

Output

48 MHz clock output. High impedance state when OE=1.

3

VDDO

Power

Output voltage level. Connect to +1.8 or 2.5 V. Same voltage as pin

12.

4OE

Input

Output Enable pin. See table above. Internal pull-down resistor.

5

VDD

Power

Connect to +1.8 V.

6

22M

Output

22.5792 MHz clock output. Internal pull-down. High impedance state

when OE=1.

7

GND

Power

Connect to ground.

8

SCK

Input

9

SDATA

Input

10

GND

Power

Connect to ground.

11

22/24M

Output

Selectable output clock of either 22.5792M or 24.576M. See table.

Internal pull-down. High impedance state. OE=1.

12

VDDO

Power

Output voltage level. Connect to +1.8 or 2.5 V. Same voltage as pin 3.

13

37M

Output

Spread spectrum 37 MHz clock output. See table. Internal pull-down.

High impedance state when OE=1.

14

VDD

Power

Connect to +1.8 V.

15

GND

Power

Connect to ground.

16

GND

Power

Connect to ground.

17

27M

Output

27 MHz reference clock output. Internal pull-down. High impedance

state when OE=1.