IMX7ULPCECB2 datasheet(21/122 Pages) NXP

21 / 122 page

Table 1. i.MX 7ULP modules list (continued)

Block Name

Block Mnemonic

Subsystem

Power

Domain

Brief description

Host Controller Interface Specification

for Universal Serial Bus (EHCI). This

module can act as a host, a device or an

On-The-Go negotiable host/device on

the USB bus.

Universal Serial Bus

Phase Locked Loop

USB PLL

Clock Sources and

Control

USB Phase Locked Loop (USB PLL) is

embedded in the USB transceiver block.

This PLL allows an exact 480 MHz to be

generated from a supported reference

clock of 24 MHz. The output of this PLL

is primarily used for PLL operation. The

USB PLL clock is also made available as

a clock source for other peripherals in

the SoC.

Universal Serial Bus

Physical Layer

USB-PHY

Connectivity and

Communications

The Universal System Bus Physical

Layer (USB-PHY) implements USB

physical layer connecting to USB host/

device systems at low-speed, full-speed,

and high-speed. USB-PHY provides a

standard UTMI interface for connection

to the USB-OTG controller.

Video Input Unit

VIU

Multimedia

The Video Input Unit (VIU) provides a

parallel interface for digital video. The

VIU accepts various types of digital

video input on its parallel interface,

decodes it and optionally performs

processes such as down-scaling,

horizontal up-scaling, brightness and

contrast adjustment, pixel format

conversion, deinterlacing and horizontal

mirroring. The resultant video stream is

then stored to system memory for

subsequent post-processing and display.

Wakeup Unit

WKPU

System Control

Wakeup Unit (WKPU) module is capable

of interrupt detection and wake-up of the

Cortex-A processor when it is in low

power mode.

Watchdog Timer

WDOG0-2

Timers

AD, RT

The Watchdog Timer (WDOG) module

keeps a watch on the system functioning

and resets it in case of its failure.

Reasons for failure include run-away

software code and the stoppage of the

system clock that in a safety critical

system can lead to serious

consequences. In such cases, the

WDOG brings the system into a safe

state of operation. The WDOG monitors

the operation of the system by expecting

periodic communication from the

software, generally known as servicing

Table continues on the next page...

i.MX 7ULP modules list

i.MX 7ULP Applications Processor—Consumer, Rev. 0, 09/2020

NXP Semiconductors

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