 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ICS1893BKILF 데이터시트(PDF) 86 Page - Integrated Circuit Systems |
|
|
|||||||||||||||||||||||||||||
ICS1893BKILF 데이터시트(HTML) 86 Page - Integrated Circuit Systems |
|
|
86 / 133 page  ICS1893BF, Rev. C, 9/29/05 September, 2005 86 Chapter 7 Management Register Set ICS1893BF Data Sheet - Release Copyright © 2005, Integrated Circuit Systems, Inc. All rights reserved. 7.13.8 Link Loss Inhibit (bit 18.1) The Link Loss Inhibit bit allows an STA to prevent the ICS1893BF from dropping the link in 10Base-T mode. When an STA sets this bit to logic: • Zero, the state machine behaves normally and the link status is based on the signaling detected Twisted- Pair Receiver inputs. • One, the ICS1893BF 10Base-T Link Integrity Test state machine is forced into the ‘Link Passed’ state regardless of the Twisted-Pair Receiver input conditions. 7.13.9 Squelch Inhibit (bit 18.0) The Squelch Inhibit bit allows an STA to control the ICS1893BF Squelch Detection in 10Base-T mode. When an STA sets this bit to logic: • Zero, before the ICS1893BF can establish a valid link, the ICS1893BF must receive valid 10Base-T data. • One, before the ICS1893BF can establish a valid link, the ICS1893BF must receive both valid 10Base-T data followed by an IDL. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
