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ICS844256AM 데이터시트(PDF) 10 Page - Integrated Circuit Systems |
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ICS844256AM 데이터시트(HTML) 10 Page - Integrated Circuit Systems |
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10 / 13 page ![]() 844256AM www.icst.com/products/hiperclocks.html REV. A NOVEMBER 29, 2005 10 Integrated Circuit Systems, Inc. ICS844256 FEMTOCLOCKS™CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER PRELIMINARY 3.3V, 2.5V LVDS DRIVER TERMINATION A general LVDS interface is shown in Figure 3. In a 100 Ω differential transmission line environment, LVDS drivers FIGURE 3. TYPICAL LVDS DRIVER TERMINATION require a matched load termination of 100 Ω across near the receiver input. INPUTS: LVCMOS CONTROL PINS: All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS OUTPUTS: LVDS All unused LVDS output pairs can be either left floating or terminated with 100 Ω across. If they are left floating, we recommend that there is no trace attached. 2.5V or 3.3V + - VDD 100 Ohm Differential Transmission Line R1 100 LVDS_Driv er |
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