ICS853013AMT datasheet(10/17 Pages) ICST

10 / 17 page

853013AM

www.icst.com/products/hiperclocks.html

REV. A OCTOBER 19, 2005

Integrated

Circuit

Systems, Inc.

ICS853013

LOW SKEW, DUAL, 1-TO-3, DIFFERENTIAL-TO-

2.5V/3.3V/5V LVPECL/ECL FANOUT BUFFER

CC - 2V

RTT

o = 50Ω

FOUT

FIN

RTT =

((V

OH + VOL) / (VCC – 2)) – 2

3.3V

125

o = 50Ω

FOUT

FIN

The clock layout topology shown below is a typical termi-

nation for LVPECL outputs. The two different layouts men-

tioned are recommended only as guidelines.

FOUT and nFOUT are low impedance follower outputs that

generate ECL/LVPECL compatible outputs. Therefore, ter-

minating resistors (DC current path to ground) or current

sources must be used for functionality. These outputs are

designed to drive 50

Ω transmission lines. Matched imped-

ance techniques should be used to maximize operating

frequency and minimize signal distortion. Figures 3A and

3B show two different layouts which are recommended

only as guidelines. Other suitable clock layouts may exist

and it would be recommended that the board designers

simulate to guarantee compatibility across all printed cir-

cuit and clock component process variations.

TERMINATION FOR 3.3V LVPECL OUTPUTS

FIGURE 3B. LVPECL OUTPUT TERMINATION

FIGURE 3A. LVPECL OUTPUT TERMINATION

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