ICS853111 datasheet(7/13 Pages) ICST

7 / 13 page

853111AY

www.icst.com/products/hiperclocks.html

REV. D JULY 22, 2003

Integrated

Circuit

Systems, Inc.

ICS853111

LOW SKEW, 1-TO-10

DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER

PRELIMINARY

FIGURE 2A. SINGLE ENDED LVCMOS SIGNAL DRIVING DIFFERENTIAL INPUT

Figure 2A shows an example of the differential input that can

be wired to accept single ended LVCMOS levels. The reference

voltage level V

BB generated from the device is connected to

APPLICATION INFORMATION

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVCMOS LEVELS

the negative input. The C1 capacitor should be located as close

as possible to the input pin.

FIGURE 2B. SINGLE ENDED LVPECL SIGNAL DRIVING DIFFERENTIAL INPUT

Figure 2B shows an example of the differential input that can

be wired to accept single ended LVPECL levels. The reference

voltage level V

BB generated from the device is connected to

the negative input. The C1 capacitor should be located as close

as possible to the input pin.

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LVPECL LEVELS

CLK_IN

0.1uF

VDD(or VCC)

VBB

VCC

V_REF

0.1u

Single Ended Clock Input

PCLK

nPCLK

ICS853111 데이터시트(PDF) 7 Page - Integrated Circuit Systems