SST26VF080AT-80ESLASHMF datasheet(4/72 Pages) MICROCHIP

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DS20006203C-page 4

SST26VF080A

2.0

PIN DESCRIPTION

FIGURE 2-1:

PIN DESCRIPTIONS

TABLE 2-1:

PIN DESCRIPTION

Symbol

Pin Name

Functions

SCK

Serial Clock

Provide the timing of the serial interface.

Commands, addresses, or input data are latched on the rising edge of the clock

input, while output data is shifted out on the falling edge of the clock input.

SIO[3:0]

Serial Data

Input/Output

Transfer commands, addresses, or data serially into the device or data out of

the device. Inputs are latched on the rising edge of the serial clock. Data is

shifted out on the falling edge of the serial clock. The Enable Quad I/O (EQIO)

command instruction configures these pins for Quad I/O mode.

Serial Data Input

for SPI mode

Transfer commands, addresses or data serially into the device. Inputs are

latched on the rising edge of the serial clock. SI is the default state after a

Power-on Reset or hardware Reset.

Serial Data Output

for SPI mode

Transfer data serially out of the device. Data is shifted out on the falling edge of

the serial clock. SO is the default state after a Power-on Reset or hardware

Reset.

CE#

Chip Enable

The device is enabled by a high-to-low transition on CE#. CE# must remain low

for the duration of any command sequence; or in the case of write operations,

for the command/data input sequence.

WP#

Write-Protect

The WP# pin is used in conjunction with the WPEN and IOC bits in the Configu-

ration register to prohibit write operations to the Block Protection register. This

pin only works in SPI, single-bit and dual-bit Read mode.

HOLD#

Hold

Temporarily stops serial communication with the SPI Flash memory while the

device is selected. This pin only works in SPI, single-bit and dual-bit Read mode

and must be tied high when not in use.

RESET#

Reset

Reset the operation and internal logic of the device.

VDD

Power Supply

Provide power supply voltage.

VSS

Ground

Note:

The exposed pad on the bottom side of WDFN package is internally not connected. It can externally be

soldered to ground for better device attachment to the board.

PIN ASSIGNMENT FOR 8-LEAD SOIC

CE#

SO/SIO1

WP#/SIO2

Vss

VDD

RESET#/HOLD#/SIO3

SCK

SI/SIO0

Top View

PIN ASSIGNMENT FOR 8-CONTACT WDFN

CE#

SO/SIO1

WP#/SIO2

Vss

VDD

RESET#/HOLD#/SIO3

SCK

SI/SIO0

Top View

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