YAC520

13

s Example of PCB Layout

To achieve the maximum performance of this device, it is necessary to take special care for the power

supply and the method of grounding. (The above figure shows an example of the layout on the PCB that

assumes the daisy chain connection of two HGVC1s.) Connect a regulated low noise 5 V power supply to

AVDD, and de-couple with DVDD through a resistor for the purpose of avoiding mixing of noise that is

generated in the serial interface. (Refer to s Example of System Configuration) At this time, the de-

coupling capacitor should be located as close as possible to HGVC1. The analog domain and digital domain

should be grounded separately, and HGVC1 should be located in the analog domain side, so that a pattern

layout with minimized impedance to AVSS and DVSS pins can be achieved. The analog ground and digital

ground should be given sufficiently wide areas respectively so that the radiation of the noise can be

suppressed effectively.

plane (upper side), and analog signals and digital signals should be arranged without crossing each other and

without running side by side to prevent their interference.

0.1

µF

4.7

Ω

47

µF

0.1

µF

47

µF

10

µF

0.1

µF

47

µF

0.1

µF

47

µF

Digital Ground Plane

Analog Ground Plane

4.7

Ω

AVDD

+5V

DVDD

10

µF

Digital Logic

Analog Circuit

SDATAI

SDATAO