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PCIMX6QP5AVT2AB 데이터시트(PDF) 130 Page - NXP Semiconductors

부품명 PCIMX6QP5AVT2AB
상세설명  i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products
PDF  160 Pages
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제조업체  NXP [NXP Semiconductors]
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PCIMX6QP5AVT2AB 데이터시트(HTML) 130 Page - NXP Semiconductors

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i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018
130
NXP Semiconductors
Electrical Characteristics
4.12.21 USB HSIC Timings
This section describes the electrical information of the USB HSIC port.
NOTE
HSIC is a DDR signal. The following timing specification is for both rising
and falling edges.
4.12.21.1 Transmit Timing
Figure 94. USB HSIC Transmit Waveform
4.12.21.2 Receive Timing
Figure 95. USB HSIC Receive Waveform
Table 82. USB HSIC Transmit Parameters
Name
Parameter
Min
Max
Unit
Comment
Tstrobe
strobe period
4.166
4.167
ns
—
Todelay
data output delay time
550
1350
ps
Measured at 50% point
Tslew
strobe/data rising/falling time
0.7
2
V/ns
Averaged from 30% – 70% points
Table 83. USB HSIC Receive Parameters1
1 The timings in the table are guaranteed when:
—AC I/O voltage is between 0.9x to 1x of the I/O supply
—DDR_SEL configuration bits of the I/O are set to (10)b
Name
Parameter
Min
Max
Unit
Comment
Tstrobe
strobe period
4.166
4.167
ns
—
Thold
data hold time
300
—
ps
Measured at 50% point
Tsetup
data setup time
365
—
ps
Measured at 50% point
Tslew
strobe/data rising/falling time
0.7
2
V/ns
Averaged from 30% – 70% points
USB_H_STROBE
USB_H_DATA
Todelay
Tstrobe
Todelay
USB_H_STROBE
USB_H_DATA
Thold
Tstrobe
Tsetup



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