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MCIMX6DP4AVT2AB 데이터시트(PDF) 57 Page - NXP Semiconductors

부품명 MCIMX6DP4AVT2AB
상세설명  i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products
PDF  160 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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Electrical Characteristics
i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018
NXP Semiconductors
57
4.9.3.4
General EIM Timing-Asynchronous Mode
Figure 16 through Figure 20 and Table 38 provide timing parameters relative to the chip select (CS) state
for asynchronous and DTACK EIM accesses with corresponding EIM bit fields and the timing
parameters mentioned above.
Asynchronous read and write access length in cycles may vary from what is shown in Figure 16 through
Figure 19 as RWSC, OEN & CSN is configured differently. See the i.MX 6DualPlus/6QuadPlus reference
manual (IMX6DQPRM) for the EIM programming model.
Figure 16. Asynchronous Memory Read Access (RWSC = 5)
Last Valid Address
Address V1
D(V1)
EIM_ADDRxx/
EIM_DATA[07:00]
EIM_WE_B
EIM_LBA_B
EIM_OE_B
EIM_EBx_B
EIM_CSx_B
Next Address
WE39
WE35
WE37
WE32
WE36
WE38
WE43
WE40
WE31
WE44
INT_CLK
start of
access
end of
access
MAXDI
MAXCSO
MAXCO
EIM_ADxx



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