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MCIMX6DP6AYM2AB 데이터시트(PDF) 51 Page - NXP Semiconductors

부품명 MCIMX6DP6AYM2AB
상세설명  i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products
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제조업체  NXP [NXP Semiconductors]
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Electrical Characteristics
i.MX 6DualPlus/6QuadPlus Applications Processors Industrial Products, Rev. 3, 11/2018
NXP Semiconductors
51
4.9.2
WDOG Reset Timing Parameters
Figure 9 shows the WDOG reset timing and Table 35 lists the timing parameters.
Figure 9. WDOG1_B Timing Diagram
NOTE
XTALOSC_RTC_XTALI is approximately 32 kHz.
XTALOSC_RTC_XTALI cycle is one period or approximately 30
μs.
NOTE
WDOG1_B output signals (for each one of the Watchdog modules) do not
have dedicated pins, but are muxed out through the IOMUX. See the IOMUX
manual for detailed information.
4.9.3
External Interface Module (EIM)
The following subsections provide information on the EIM. Maximum operating frequency for EIM data
transfer is 104 MHz. Timing parameters in this section that are given as a function of register settings or
clock periods are valid for the entire range of allowed frequencies (0–104 MHz).
Table 34. Reset Timing Parameters
ID
Parameter
Min
Max
Unit
CC1
Duration of SRC_POR_B to be qualified as valid
1
—
XTALOSC_RTC_ XTALI cycle
Table 35. WDOG1_B Timing Parameters
ID
Parameter
Min
Max
Unit
CC3
Duration of WDOG1_B Assertion
1
—
XTALOSC_RTC_ XTALI cycle
WDOG1_B
CC3
(Output)



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