| 전자부품 데이터시트 검색엔진 |
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CD1865 데이터시트(PDF) 39 Page - Intel Corporation |
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CD1865 데이터시트(HTML) 39 Page - Intel Corporation |
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39 / 150 page ![]() Intelligent Eight-Channel Communications Controller — CD1865 Datasheet 39 5.5.3 Method 2b — Interrupt Interface, Single-Level Interrupt with Single-Level Acknowledge This method is illustrated in Figure 10. It is best-suited to host systems having a single interrupt input. The three service request lines from the CD1865 are run through an ‘OR’ gate to the host’s interrupt input. When an interrupt occurs, the host system polls the CD1865s, determines which of the three levels is interrupted, and acknowledges it accordingly. Figure 9. Three-Level Interrupt with Single-Level Acknowledge Example INTERRUPT CONTROLLER (8259A OR EQUIVALENT) CD1865 # 1 CD1865 # 2 MICROPROCESSOR ADDRESS DECODE LOGIC A1–A3 A8–A23 A4–A7 D0–D7 ALE INT A0–A2 A3-A6 CS* D0–D7 RREQ* TREQ* MREQ* A0–A2 A3–A6 CS* D0–D7 RREQ* TREQ* MREQ* ACKIN* ACKOUT* ACKOUT* ACKIN* |
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