DS2152LN datasheet(4/97 Pages) MAXIM

4 / 97 page

DS2152

4 of 97

LIST OF FIGURES

Figure 1-1. DS2152 Enhanced T1 Single-Chip Transceiver ......................................................................8

Figure 15-1. External Analog Connections...............................................................................................78

Figure 15-2. Jitter Tolerance ....................................................................................................................78

Figure 15-3. Transmit Waveform Template..............................................................................................79

Figure 15-4. Jitter Attenuation ..................................................................................................................79

Figure 16-1. Receive Side D4 Timing.......................................................................................................80

Figure 16-2. Receive Side Boundary Timing (with Elastic Store Disabled) ..............................................80

Figure 16-3. Receive Side Boundary Timing (with Elastic Store Disabled) ..............................................81

Figure 16-4. Receive Side 1.544MHz Boundary Timing (with Elastic Store Enabled) .............................81

Figure 16-5. Receive Side 2.048MHz Boundary Timing (with Elastic Store Enabled) .............................82

Figure 16-6. Transmit Side D4 Timing......................................................................................................82

Figure 16-7. Transmit Side Timing ...........................................................................................................83

Figure 16-8. Transmit Side Boundary Timing...........................................................................................83

Figure 16-9. Transmit Side 1.544MHz Boundary Timing (with Elastic Store Enabled) ............................84

Figure 16-10. Transmit Side 2.048MHz Boundary Timing (with Elastic Store Enabled) ..........................84

Figure 16-11. Transmit Data Flow ............................................................................................................85

Figure 18-1. Intel Bus Read AC Timing (BTS = 0/MUX = 1) ....................................................................87

Figure 18-2. Intel Bus Write AC Timing (BTS = 0/MUX = 1).....................................................................88

Figure 18-3. Motorola Bus AC Timing (BTS = 1/MUX = 1).......................................................................88

Figure 18-4. Receive Side AC Timing ......................................................................................................90

Figure 18-5. Receive System Side AC Timing .........................................................................................91

Figure 18-6. Receive Line Interface AC Timing........................................................................................91

Figure 18-7. Transmit Side AC Timing .....................................................................................................93

Figure 18-8. Transmit System Side AC Timing ........................................................................................94

Figure 18-9. Transmit Line Interface Side AC Timing...............................................................................94

Figure 18-10. Intel Bus Read AC Timing (BTS = 0/MUX = 0) ..................................................................95

Figure 18-11. Intel Bus Write AC Timing (BTS=0/MUX=0).......................................................................96

Figure 18-12. Motorola Bus Read AC Timing (BTS = 1/MUX = 0) ...........................................................96

Figure 18-13. Motorola Bus Write AC Timing (BTS = 1/MUX = 0) ...........................................................96

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