| 전자부품 데이터시트 검색엔진 |
|
DLPA2000 데이터시트(PDF) 32 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
DLPA2000 데이터시트(HTML) 32 Page - Texas Instruments |
|
32 / 39 page ![]() 10 Layout 10.1 Layout Guidelines There are no specific layout guidelines for the DMD as typically DMD is connected using a board to board connector to a flex cable. Flex cable provides the interface of data and control signals between the DLPC1438 controller and the DLP300S DMD. For detailed layout guidelines refer to the layout design files. Some layout guideline for the flex cable interface with DMD are: • Match lengths for the LS_WDATA and LS_CLK signals. • Minimize vias, layer changes, and turns for the HS bus signals. Refer Figure 10-1. • Minimum of two 100-nF decoupling capacitor close to VBIAS. Capacitor C6 and C7 in Figure 10-1. • Minimum of two 100-nF decoupling capacitor close to VRST. Capacitor C9 and C8 in Figure 10-1. • Minimum of two 220-nF decoupling capacitor close to VOFS. Capacitor C5 and C4 in Figure 10-1. • Minimum of four 100-nF decoupling capacitor close to VDDI and VDD. Capacitor C1, C2, C3 and C10 in Figure 10-1. 10.2 Layout Example Figure 10-1. Power Supply Connections DLP300S DLPS214A – JULY 2021 – REVISED AUGUST 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: DLP300S |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |