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ML7005MB 데이터시트(PDF) 15 Page - OKI electronic componets |
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ML7005MB 데이터시트(HTML) 15 Page - OKI electronic componets |
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15 / 25 page ![]() ¡ Semiconductor ML7005 15/24 REGISTER DESCRIPTION Register Interface Description The ML7005 contains a 4-bit DTMF transmit data register (DTMFT), a 4-bit DTMF receive data register (DTMFR), a 4-bit control register (CR), and a 4-bit status register (STR). The DTMFT and CR registers are for Write-only and the DTMFR and STR registers are for Read-only. When the PTYPE pin is "1", accessing the registers is possible in the Intel processor mode. When the PTYPE pin is "0", accessing the registers is possible in the Motorola processor mode. In the Intel processor mode (PTYPE="1"), when CS is "0", data can be written to the DTMFT and CR registers by fetching data from D3 to D0 at the rising edge of the WR signal. When CS is "0", the contents of DTMFR and STR can be transferred to D3 to D0 by setting READ to "0". In the Motorola processor mode (PTYPE="0"), when CS and WR are "0", data can be written to the DTMFT and CR registers by fetching D3 to D0 data and ALE at the falling edge of READ. When CS is "0" and WR is "1", the contents of DTMFR and STR are transferred to D3 to D0 by latching ALE at the rising edge of READ. When the PD pin is set to "1" the DTMFT and CR registers are reset. Table 1 Outline of Registers Note: The contents of the DTMFT and CR registers cannot be read. Table 2 Register Names Register name Accessing (address) in Intel processor mode Description Accessing in Motorola processor mode Writing to DTMFT WR ALE D0 D1 Reading from DTMFR 0 1 0 0 0 1 0 0 DTMFT DTMFR Writing to CR 0 1 0 1 CR Reading from STR 1 1 1 1 STR Register name D0 D1 D2 D3 DTT0 DTR0 DTT1 DTR1 DTT2 DTR2 DTT3 DTR3 DTMFT DTMFR MFC DOEN DTTIM CPGC CR DETF CPDR FXDR SP STR |
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