ADP1052ACPZ-R7 datasheet(105/113 Pages) AD

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Data Sheet

ADP1052

Rev. B | Page 105 of 113

Table 183. Register 0xFE63—Modulation Reference MSBs Setting for Open-Loop Input Voltage Feedforward Operation

Bits

Bit Name/Function

R/W

Description

[7:0]

Modulation

reference setting

MSBs

R/W

This register sets the eight MSBs of the modulation reference in open-loop feedforward operation mode.

The step size of an LSB depends on the switching frequency.

Switching Frequency Range (kHz)

LSB Step Size (ns)

49 to 87

97.5 to 184

195.5 to 379

390.5 to 625

Table 184. Register 0xFE64—Modulation Reference LSBs Setting for Open-Loop Input Voltage Feedforward Operation

Bits

Bit Name/Function

R/W

Description

[7:0]

Modulation

reference setting

LSBs

R/W

This register sets the eight LSBs of the modulation reference in open-loop feedforward operation mode.

The step size of an LSB depends on the switching frequency.

Switching Frequency Range (kHz)

LSB Step Size (ps)

49 to 87

312.5

97.5 to 184

156.25

195.5 to 379

78.125

390.5 to 625

39.0625

Table 185. Register 0xFE65—Peak Value and Average Value Update Rate Settings

Bits

Bit Name/

Function

R/W

Description

[7:6]

Reserved

R/W

Reserved.

[5:3]

Peak value

update rate

R/W

These bits specify the update rate for the peak value of the output voltage (MFR_VOUT_MAX/_MIN), output

current (MFR_IOUT_MAX), output power (MFR_POUT_MAX), and temperature (MFR_TEMPERATURE_MAX).

Bit 2

Bit 1

Bit 0

Update Rate

2.6 ms

1.3 ms

655 µs

327 µs

163 µs

82 µs

[2:0]

Average value

update rate

R/W

These bits specify the update rate for the average input current (READ_IIN), output current (READ_IOUT),

output power (READ_POUT), and temperature (READ_TEMPERATURE_1).

Bit 2

Bit 1

Bit 0

Update Rate (ms)

126

252

504

Table 186. Register 0xFE66—Adaptive Dead Time Compensation Configuration

Bits

Bit Name/Function

R/W

Description

[7:6]

Averaging period

R/W

These bits specify the averaging period for the CS1 current used to set the adaptive dead time. It is

recommended that the averaging time be set to a value much greater than any transient condition.

Bit 7

Bit 6

Averaging Period (ms)

2.5

1.2

0.6

0.3

[5:3]

Update rate

R/W

The adaptive dead time compensation algorithm adjusts dead time in steps of 5 ns. These bits

program the number of PWM switching cycles between each step. The number is calculated as 2N + 1,

where N is the 3-bit value specified by these bits. For example, if N = 6 (110 binary), each PWM edge is

adjusted by 5 ns every 26 + 1 = 65 switching cycles.

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