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EDBA164B4PR-1DATF-R 데이터시트(PDF) 87 Page - Micron Technology

부품명 EDBA164B4PR-1DATF-R
상세설명  216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Features
PDF  152 Pages
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제조업체  MICRON [Micron Technology]
홈페이지  http://www.micron.com
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EDBA164B4PR-1DATF-R 데이터시트(HTML) 87 Page - Micron Technology

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Figure 59: READ to Power-Down Entry
CK_c
CKE1, 2
T0
T1
T2
Tx
Tx + 1
Tx + 2
Tx + 3
Tx + 4
Tx + 5
Tx + 6
Tx + 7
Tx + 8
Tx + 9
CMD
DQ
DQS_c
READ
D
OUT DOUT DOUT DOUT
RL
tISCKE
CKE1, 2
T0
T1
T2
Tx
Tx + 1
Tx + 2
Tx + 3
Tx + 4
Tx + 5
Tx + 6
Tx + 7
Tx + 8
Tx + 9
CMD
DQ
READ
D
OUT DOUT DOUT DOUT DOUT DOUT DOUT DOUT
RL
tISCKE
BL = 4
BL = 8
CK_t
CK_c
CK_t
DQS_t
DQS_c
DQS_t
Notes:
1. CKE must be held HIGH until the end of the burst operation.
2. CKE can be registered LOW at (RL + RU(tDQSCK(MAX)/tCK) + BL/2 + 1) clock cycles after
the clock on which the READ command is registered.
216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM
Power-Down
09005aef85eb530a
216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN
87
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2014 Micron Technology, Inc. All rights reserved.



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