전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ADIN1300CCPZ-R7 데이터시트(PDF) 6 Page - Analog Devices

부품명 ADIN1300CCPZ-R7
상세설명  Robust, Industrial, Low Latency and Low Power 10 Mbps
PDF  79 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

ADIN1300CCPZ-R7 데이터시트(HTML) 6 Page - Analog Devices

Back Button ADIN1300CCPZ-R7 Datasheet HTML 2Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 3Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 4Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 5Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 6Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 7Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 8Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 9Page - Analog Devices ADIN1300CCPZ-R7 Datasheet HTML 10Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 79 page
background image
ADIN1300
Data Sheet
Rev. 0 | Page 6 of 79
TIMING CHARACTERISTICS
Power-Up Timing
Table 2. Power-Up Timing
Parameter
Description
Min
Typ
Max
Unit
tRAMP
Power supply ramp time
40
ms
t1
Minimum time interval to internal power good1
6.8
ms
t2
XTAL_I crystal settling time
1.5
2
ms
XTAL_I external clock settling time
20
μs
t3
Hardware configuration latch time
64
μs
t4
Management interface active
5
ms
1
The minimum time interval is referenced to the last supply to reach its rising threshold. There is no specific power supply sequencing required.
DVDD_0P9
XTAL_I
RESET_N
PIN
MDC
HARDWARE
CONFIGURATION
PINS
CONFIGURATION
LATCHED
DUAL FUNCTION
PINS ENABLED AS OUTPUTS
AVDD_3P3
FUNCTIONAL
STATE
POWER
GOOD
RESET RELEASED
CLOCKSTABILISING
HARDWARE
CONFIG LATCHED
MANAGEMENT
INTERFACE ACTIVE
VDDIO
SUPPLY
RAMP
POWER
OFF
t3
tRAMP
tRAMP
tRAMP
t4
t2
t1
Figure 2. Power-Up Timing
Hardware Reset Timing
Table 3. Hardware Reset Timing
Parameter
Description
Min
Typ
Max
Unit
t1
RESET_N low time
10
μs
t2
XTAL_I crystal settling time
1.5
ms
XTAL_I external clock settling time
0
ms
t3
Hardware configuration latch time
64
μs
t4
Management interface active
5
ms



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com