MMA034AA

SMD-00173 Rev C

Subject to Change Without Notice

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DC Bias:

The MMA034AA features a patented on-

chip passive bias circuit called ‘PLFX’. This circuit isolates

the amplifier from bias coil resonances above 14GHz, allowing the use of less expensive coils;

traditional biasing requires bias coils with self-resonances outside the operating range of the amplifier.

The device is biased by applying a positive voltage to the drain (Vdd), then setting the drain current

(Idd) using a negative voltage on the gate (Vg1). The nominal bias is Vdd=8V, Idd=250mA.

Improved performance can be achieved with gate bias adjustment; use the drain termination bypass

to alter the output voltage (detected from the drain sense).

Gain Control:

Dynamic gain control is available when operating the amplifier in the linear gain region. Negative

voltage applied to the second gate (Vg2) reduces amplifier gain.

RF Power Detection:

RF output power can be calculated from the difference between the RF detector voltage

and the DC detector voltage, minus a DC offset. Please consult the application note available

on the Microsemi website.

Low-Frequency Use:

The MMA034AA has been designed so that the bandwidth can be extended to low frequencies.

The low end corner frequency of the device is primarily determined by the external biasing

and AC coupling circuitry.

Matching:

The amplifier incorporates on- chip termination resistors on the RF input and output. These

resistors are RF grounded through on-chip capacitors, which are small and become open circuits

at frequencies below 1GHz.

A pair of gate and drain termination bypass pads are provided for connecting external capacitors

required for the low frequency extension network. These capacitors should be 10x the value

of the DC blocking capacitors.

DC Blocks:

The amplifier is DC coupled to the RF input and output pads; DC voltage on these pads must

be isolated from external circuitry.

For operation above 2GHz, a series DC-blocking capacitor with minimum value of 20pF

is recommended; operation above 40MHz requires a minimum of 120pF.

Bias Inductor:

DC bias applied to the drain (Vdd) must be decoupled with an off-chip RF choke inductor.

The amount of bias inductance will determine the low frequency operating point. Inductive biasing

can also be applied to the chip through the RF output.

For many applications above 2GHz, a bondwire from the Vdd pad will suffice as the biasing inductor.

Ensure the correct bond length as shown in the assembly diagrams.