| 전자부품 데이터시트 검색엔진 |
|
PFD1K 데이터시트(PDF) 5 Page - Microsemi Corporation |
|
|
|||||||||||||||||||||||||||||
PFD1K 데이터시트(HTML) 5 Page - Microsemi Corporation |
|
5 / 19 page ![]() 5 of 19 SMD-00191 Rev D Subject to Change Without Notice PFD1K Control Logic Circuitry: The same circuitry is used for all control lines: A[0:3], R[0:6], V[0:6] and POL. A control pin left open defaults to logic 0. Analog Amplitude Controls: As was previously mentioned, VADJ can be used for fine tuning the charge pump current. Maximum current is achieved by setting VADJ to VCC. Similarly, the amplitudes of the prescaler outputs at DRO and DVO can be controlled with analog voltages VADR and VADV, respectively. As with VADJ, setting VADR and VADV to VCC results in maximum output amplitude. Simplified Control Logic Input Logic Level Minimum Typical Maximum 1 (High) VCC-1.3 V VCC VCC 0 (Low) VEE VEE VEE+0.8 V Table 1: Control Voltages (LVTTL Compatible) |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |