Data Sheet

ADRF5473

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 8 of 17

Figure 4. Pad Configuration

Table 6. Pad Function Descriptions

Pad No.

Mnemonic

Description

1, 3, 4, 6, 7, 18

GND

Ground. Bonding of these GND pads are optional. See the Applications Information section.

2

ATTIN

Attenuator Input. No dc blocking capacitor is necessary when the RF line potential is equal to 0 V dc. See Figure 7 for the interface

schematic.

5

ATTOUT

Attenuator Output. No dc blocking capacitor is necessary when the RF line potential is equal to 0 V dc. See Figure 7 for the interface

schematic.

8

Negative Supply Input. See Figure 9 for the interface schematic.

9

Positive Supply Input. See Figure 8 for the interface schematic.

10

D0

Parallel Control Input for 0.5 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the

interface schematic.

11

D1

Parallel Control Input for 1 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the

interface schematic.

12

D2

Parallel Control Input for 2 dB Attenuator Bit. See the Theory of Operation section for more information. See Figure 6 for the

interface schematic.

13

D3/SEROUT

Parallel Control Input for 4 dB Attenuator Bit (D3). Serial Data Output (SEROUT). See the Theory of Operation section for more

information. See Figure 5 for the interface schematic.

14

D4/SERIN

Parallel Control Input for 8 dB Attenuator Bit (D4). Serial Data Input (SERIN). See the Theory of Operation section for more

information. See Figure 5 for the interface schematic.

15

D5/CLK

Parallel Control Input for 16 dB Attenuator Bit (D5). Serial Clock Input (CLK). See the Theory of Operation section for more

information. See Figure 5 for the interface schematic.

16

LE

Latch Enable Input. See the Theory of Operation section for more information. See Figure 5 for the interface schematic.

17

PS

Parallel or Serial Control Interface Selection Input. See the Theory of Operation section for more information. See Figure 5 for the

interface schematic.

Carrier Bottom

The carrier bottom is gold metalized and must be directly attached to the ground plane using conductive epoxy.