LP8733 datasheet(11/86 Pages) TI

11 / 86 page

6.5 Electrical Characteristics (continued)

Limits apply over the junction temperature range –40°C ≤ TJ ≤ +140°C, specified VVANA, VVIN_Bx, VVIN_LDOx, VVOUT_Bx,

VVOUT_LDOx and IOUT range, unless otherwise noted. Typical values are at TJ = 25°C, VVANA = VVIN_Bx = VVIN_LDOx = 3.7 V,

and VOUT = 1 V, unless otherwise noted(1) (2).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VPU

Supply voltage for

external pullup resistor,

configured to open-drain

VVANA

RPU

External pullup resistor,

configured to open-drain

kΩ

ALL DIGITAL INPUTS

ILEAK

Input current

All logic inputs over pin voltage range

−1

µA

(1)

All voltage values are with respect to network ground.

(2)

Minimum (MIN) and Maximum (MAX) limits are specified by design, test, or statistical analysis. Typical (TYP) numbers are not verified,

but do represent the most likely norm.

(3)

The maximum output current can be limited by the forward current limit ILIM FWD. The power dissipation inside the die increases the

junction temperature and limits the maximum current depending of the length of the current pulse, efficiency, board and ambient

temperature.

(4)

The slew-rate can be limited by the current limit (forward or negative current limit), output capacitance and load current.

(5)

The final PFM-to-PWM and PWM-to-PFM switchover current varies slightly and is dependent on the output voltage, input voltage and

the inductor current level.

(6)

The external clock frequency must be selected so that buck switching frequency is above 1.7 MHz.

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LP8733-Q1

SNVSB64A – JUNE 2019 – REVISED JUNE 2021

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