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AD9887APCB 데이터시트(PDF) 19 Page - Analog Devices

부품명 AD9887APCB
상세설명  Dual Interface for Flat Panel Displays
PDF  44 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9887APCB 데이터시트(HTML) 19 Page - Analog Devices

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REV. 0
AD9887A
–19–
SCAN Function
The SCAN function is intended as a pseudo JTAG function for
manufacturing test of the board. The ordinary operation of the
AD9887A is disabled during SCAN.
To enable the SCAN function, set Register 14h, Bit 2 to 1. To
SCAN in data to all 48 digital outputs, apply 48 serial bits of
data and 48 clocks (typically 5 MHz, max of 20 MHz) to the
SCANIN and SCANCLK pins, respectively. The data is shifted in
on the rising edge of SCANCLK. The first serial bit shifted in
will appear at the RED A<7> output after one clock cycle. After
48 clocks, the first bit is shifted all the way to the BLUE B<0>.
The 48th bit will now be at the RED A<7> output. If SCANCLK
continues after 48 cycles, the data will continue to be shifted
from RED A<7> to BLUE B<0> and will come out of the
SCANOUT pin as serial data on the falling edge of SCANCLK.
This is illustrated in Figure 10. A setup time (tSU) of 3 ns should
be plenty and no hold time (tHOLD) is required (
≥ 0 ns). This is
illustrated in Figure 11.
tSU = 3ns
tHOLD = 0ns
SCANCLK
SCANIN
Figure 11. SCAN Setup and Hold
Alternate Pixel Sampling Mode
A Logic 1 input on Clock Invert (CKINV, Pin 94) inverts the
nominal ADC clock. CKINV can be switched between frames
to implement the alternate pixel sampling mode. This allows
higher effective image resolution to be achieved at lower pixel
rates but with lower frame rates.
On one frame, only even pixels are digitized. On the subsequent
frame, odd pixels are sampled. By reconstructing the entire
frame in the graphics controller, a complete image can be recon-
structed. This is very similar to the interlacing process that is
employed in broadcast television systems, but the interlacing is
vertical instead of horizontal. The frame data is still presented
to the display at the full desired refresh rate (usually 60 Hz) so
no flicker artifacts are added.
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
OEOEOEOEOEOE
Figure 12. Odd and Even Pixels in a Frame
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
O1
O1
O 1
O 1
O 1
O 1
Figure 13. Odd Pixels from Frame 1
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
E2
Figure 14. Even Pixels from Frame 2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
O1E2O1E2O1E2O1E2O1E2O1E2
Figure 15. Combine Frame Output from Graphics Controller
X
BIT 1
BIT 2
X
XX
BIT 1
BIT 2
BIT 47
BIT 48
X
BIT 46
BIT 47
BIT 48
X
SCANCLK
RED A<7>
BLUE B<0>
SCANOUT
SCANIN
BIT 1
BIT 2
BIT 3
BIT 1
BIT 2
BIT 3
XX
X
X
X
X
Figure 10. SCAN Timing



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