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Advance Information
FS8308
Page 9
April 2003
Phase/Frequency Detector (PFD)
The PFD compares an internal input frequency divider output signal, f
V, with an internal
reference frequency divider output signal, f
R, and generates an error signal, DO, which is
proportional to the phase error between f
V and fR. The DO output is intended for use with
a passive filter as shown in Fig. 2.
Lock Detector (LD)
When phase comparator detects phase difference, LD terminal outputs “L”. When phase
comparator locks, LD terminal outputs “H”. On standby, outputs “H”. The criteria for lock
condition is that the phase difference between f
V and fR is less than 2/xin and continues for
more than three consecutive times.
The input/output waveforms for the PFD and LD are shown in Fig. 3.
Fig. 2 – Passive low-pass filter circuit
Fig. 3 – PFD input/output waveforms
DO
to VCO
R1
C1
C2
high-Z
high-Z
high-Z
f
R
f
V
DO
LD
< 2/xin
< 2/xin
< 2/xin
2/xin
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