AS5140H datasheet(39/55 Pages) AMSCO

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[v1-09] 2018-Feb-20

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AS5140H − Detailed Description

Failure Diagnostics

The AS5140H also offers several diagnostic and failure

detection features, which are discussed in detail further in the

document.

Magnetic Field Strength Diagnosis

By Software: The MagINCn and MagDECn status bits will both

be high when the magnetic field is out of range.

By Hardware: Pins #1 (MagINCn) and #2 (MagDECn) are

open-drain outputs and will both be turned on (= low with

external pull-up resistor) when the magnetic field is out of

range. If only one of the outputs is low, the magnet is either

moving towards the chip (MagINCn) or away from the chip

(MagDECn).

Power Supply Failure Detection

By Software: If the power supply to the AS5140H is interrupted,

the digital data read by the SSI will be all “0”s. Data is only valid,

when bit OCF is high, hence a data stream with all “0”s is invalid.

To ensure adequate low levels in the failure case, a pull-down

resistor (~10kΩ) should be added between pin DO and VSS at

the receiving side.

By Hardware: The MagINCn and MagDECn pins are open drain

outputs and require external pull-up resistors. In normal

operation, these pins are high ohmic and the outputs are high

(see Figure 22). In a failure case, either when the magnetic field

is out of range or the power supply is missing, these outputs

will become low. To ensure adequate low levels in case of a

broken power supply to the AS5140H, the pull-up resistors

(>10kΩ) from each pin must be connected to the positive

supply at pin 16 (VDD5V).

By Hardware - PWM Output: The PWM output is a constant

stream of pulses with 1kHz repetition frequency. In case of

power loss, these pulses are missing.

By Hardware - Incremental Outputs: In normal operation, pins

A(#3), B(#4) and Index (#6) will never be high at the same time,

as Index is only high when A=B=low. However, after a

power-on-reset, if VDD is powered up or restarts after a power

supply interruption, all three outputs will remain in high state

until pin CSn is pulled low. If CSn is already tied to VSS during

power-up, the incremental outputs will all be high until the

internal offset compensation is finished (within tPwrUp).

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