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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32L053C6 데이터시트(PDF) 95 Page - STMicroelectronics |
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STM32L053C6 데이터시트(HTML) 95 Page - STMicroelectronics |
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95 / 136 page  DS10152 Rev 9 95/136 STM32L053x6 STM32L053x8 Electrical characteristics 113 Figure 27. Typical connection diagram using the ADC 1. Refer to Table 62: ADC characteristics for the values of RAIN, RADC and CADC. 2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the pad capacitance (roughly 7 pF). A high Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced. General PCB design guidelines Power supply decoupling should be performed as shown in Figure 28 or Figure 29, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed as close as possible to the chip. Figure 28. Power supply and reference decoupling (VREF+ not connected to VDDA) MSv34712V1 VDDA AINx IL±50nA VT RAIN(1) Cparasitic VAIN VT RADC 12-bit converter CADC Sample and hold ADC converter MS39601V1 VREF+ STM32Lxx VDDA VSSA / VREF– 1 μF // 100 nF 1 μF // 100 nF |
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