ADP165/ADP166

Data Sheet

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

UNDERVOLTAGE LOCKOUT (UVLO)

Input Voltage Rising

2.19

V

Input Voltage Falling

1.60

V

Hysteresis

85

mV

OUTPUT NOISE

105

µV rms

100

µV rms

80

µV rms

POWER SUPPLY REJECTION RATIO

PSRR

60

dB

65

dB

72

dB

50

dB

50

dB

62

dB

1

Accuracy when VOUT is connected directly to ADJ. When the VOUT voltage is set by the external feedback resistors, the absolute accuracy in adjust mode depends on

the tolerances of the resistors used.

2

Based on an endpoint calculation using 0 μA and 150 mA loads.

3

Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output

voltages above 2.2 V.

4

Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.

5

Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 3.0 V

output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 V, or 2.7 V.

RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITORS

Table 2.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

INPUT AND OUTPUT CAPACITOR

0.7

1

µF

Capacitor Effective Series Resistance (ESR)

0.001

0.2

Ω

1

The minimum input and output capacitance must be greater than 0.7 µF over the full range of operating conditions. The full range of operating conditions in the

application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;

however, Y5V and Z5U capacitors are not recommended for use with any LDO.

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